F407-support

include/sta/devices/stm32/clocks.hpp

@@ -41,7 +41,6 @@ namespace sta
  */
 #define STA_STM32_GET_PCLK_FREQ_FN(n)               HAL_RCC_GetPCLK ## n ## Freq
 
-
 /**
  * @brief Internal helper for macro expansion.
  *
@@ -49,6 +48,7 @@ namespace sta
  * @return  Function returning PCLK frequency
  */
 #define _STA_STM32_GET_PCLK_FREQ_FN(n)              STA_STM32_GET_PCLK_FREQ_FN(n)
+
 /**
  * @brief Map instance name to PCLK index.
  *
@@ -73,18 +73,21 @@ namespace sta
  * @param n         TIM index
  */
 #define STA_STM32_GET_TIM_PCLK_FREQ_FN(n)           _STA_STM32_GET_PCLK_FREQ_FN(_STA_STM32_PCLK_IDX_MAP(TIM, n))
+
 /**
  * @brief Get function returning frequency of PCLK used by SPI interface.
  *
  * @param n         SPI interface index
  */
 #define STA_STM32_GET_SPI_PCLK_FREQ_FN(n)           _STA_STM32_GET_PCLK_FREQ_FN(_STA_STM32_PCLK_IDX_MAP(SPI, n))
+
 /**
  * @brief Get function returning frequency of PCLK used by I2C interface.
  *
  * @param n         I2C interface index
  */
 #define STA_STM32_GET_I2C_PCLK_FREQ_FN(n)           _STA_STM32_GET_PCLK_FREQ_FN(_STA_STM32_PCLK_IDX_MAP(I2C, n))
+
 /**
  * @brief Get function returning frequency of PCLK used by USART interface.
  *
@@ -92,6 +95,7 @@ namespace sta
  */
 #define STA_STM32_GET_USART_PCLK_FREQ_FN(n)         _STA_STM32_GET_PCLK_FREQ_FN(_STA_STM32_PCLK_IDX_MAP(USART, n))
 
+
 /**
  * @brief Get function returning frequency of PCLK used by HAL instance.
  *

include/sta/devices/stm32/mcu/STM32F407xx.hpp

@@ -0,0 +1,82 @@
+#ifndef STA_CORE_STM32_MCU_STM32F407xx_HPP
+#define STA_CORE_STM32_MCU_STM32F407xx_HPP
+
+#ifndef STM32F407xx
+#  error "MCU config incompatible"
+#endif // STM32F407xx
+
+#include <sta/devices/stm32/mcu/common.hpp>
+
+// Peripheral clock mappings
+//
+
+// TIM to PCLK
+#define STA_STM32_TIM_1_PCLK_IDX        2
+#define STA_STM32_TIM_2_PCLK_IDX        1
+#define STA_STM32_TIM_3_PCLK_IDX        1
+#define STA_STM32_TIM_4_PCLK_IDX        1
+#define STA_STM32_TIM_5_PCLK_IDX        1
+#define STA_STM32_TIM_6_PCLK_IDX        1
+#define STA_STM32_TIM_7_PCLK_IDX        1
+#define STA_STM32_TIM_8_PCLK_IDX        2
+#define STA_STM32_TIM_9_PCLK_IDX        2
+#define STA_STM32_TIM_10_PCLK_IDX       2
+#define STA_STM32_TIM_11_PCLK_IDX       2
+#define STA_STM32_TIM_12_PCLK_IDX       1
+#define STA_STM32_TIM_13_PCLK_IDX       1
+#define STA_STM32_TIM_14_PCLK_IDX       1
+
+// SPI to PCLK
+#define STA_STM32_SPI_1_PCLK_IDX        2
+#define STA_STM32_SPI_2_PCLK_IDX        1
+#define STA_STM32_SPI_3_PCLK_IDX        1
+
+// I2C to PCLK
+#define STA_STM32_I2C_1_PCLK_IDX        1
+#define STA_STM32_I2C_2_PCLK_IDX        1
+#define STA_STM32_I2C_3_PCLK_IDX        1
+
+// USART to PCLK
+#define STA_STM32_USART_1_PCLK_IDX      2
+#define STA_STM32_USART_2_PCLK_IDX      1
+#define STA_STM32_USART_3_PCLK_IDX      1
+#define STA_STM32_USART_6_PCLK_IDX      2
+
+
+// HAL handle mappings
+//
+
+#define STA_STM32_htim1_PCLK_IDX        STA_STM32_TIM_1_PCLK_IDX
+#define STA_STM32_htim2_PCLK_IDX        STA_STM32_TIM_2_PCLK_IDX
+#define STA_STM32_htim3_PCLK_IDX        STA_STM32_TIM_3_PCLK_IDX
+#define STA_STM32_htim4_PCLK_IDX        STA_STM32_TIM_4_PCLK_IDX
+#define STA_STM32_htim5_PCLK_IDX        STA_STM32_TIM_5_PCLK_IDX
+#define STA_STM32_htim6_PCLK_IDX        STA_STM32_TIM_6_PCLK_IDX
+#define STA_STM32_htim7_PCLK_IDX        STA_STM32_TIM_7_PCLK_IDX
+#define STA_STM32_htim8_PCLK_IDX        STA_STM32_TIM_8_PCLK_IDX
+#define STA_STM32_htim9_PCLK_IDX        STA_STM32_TIM_9_PCLK_IDX
+#define STA_STM32_htim10_PCLK_IDX       STA_STM32_TIM_10_PCLK_IDX
+#define STA_STM32_htim11_PCLK_IDX       STA_STM32_TIM_11_PCLK_IDX
+#define STA_STM32_htim12_PCLK_IDX       STA_STM32_TIM_12_PCLK_IDX
+#define STA_STM32_htim13_PCLK_IDX       STA_STM32_TIM_13_PCLK_IDX
+
+// SPI to PCLK
+#define STA_STM32_hspi1_PCLK_IDX        STA_STM32_SPI_1_PCLK_IDX
+#define STA_STM32_hspi2_PCLK_IDX        STA_STM32_SPI_2_PCLK_IDX
+#define STA_STM32_hspi3_PCLK_IDX        STA_STM32_SPI_3_PCLK_IDX
+#define STA_STM32_hspi4_PCLK_IDX        STA_STM32_SPI_4_PCLK_IDX
+#define STA_STM32_hspi5_PCLK_IDX        STA_STM32_SPI_5_PCLK_IDX
+
+// I2C to PCLK
+#define STA_STM32_hi2c1_PCLK_IDX        STA_STM32_I2C_1_PCLK_IDX
+#define STA_STM32_hi2c2_PCLK_IDX        STA_STM32_I2C_2_PCLK_IDX
+#define STA_STM32_h12c3_PCLK_IDX        STA_STM32_I2C_3_PCLK_IDX
+
+// USART to PCLK
+#define STA_STM32_husart1_PCLK_IDX      STA_STM32_USART_1_PCLK_IDX
+#define STA_STM32_husart2_PCLK_IDX      STA_STM32_USART_2_PCLK_IDX
+#define STA_STM32_husart3_PCLK_IDX      STA_STM32_USART_3_PCLK_IDX
+#define STA_STM32_husart6_PCLK_IDX      STA_STM32_USART_6_PCLK_IDX
+
+
+#endif // STA_CORE_STM32_MCU_STM32F407xx_HPP

include/sta/devices/stm32/mcu/STM32F411xE.hpp

@@ -48,6 +48,7 @@
 // HAL handle mappings
 //
 
+// TIM to PCLK
 #define STA_STM32_htim1_PCLK_IDX        STA_STM32_TIM_1_PCLK_IDX
 #define STA_STM32_htim2_PCLK_IDX        STA_STM32_TIM_2_PCLK_IDX
 #define STA_STM32_htim3_PCLK_IDX        STA_STM32_TIM_3_PCLK_IDX

include/sta/devices/stm32/mcu/template.hpp

@@ -0,0 +1,61 @@
+#ifndef STA_CORE_STM32_MCU_TEMPLATE_HPP
+#define STA_CORE_STM32_MCU_TEMPLATE_HPP
+
+#ifndef STM32_YOUR_MCU_xx
+#  error "MCU config incompatible"
+#endif // STM32_YOUR_MCU_xx
+
+#include <sta/devices/stm32/mcu/common.hpp>
+
+// Peripheral clock mappings
+//
+
+// TIM to PCLK
+/**
+ * Look up the datasheet for the MCU you are using. There you will find a functional
+ * diagram, where all timers (e.g. "TIM1") are displayed. They are all connected to a
+ * "Advanced Peripheral Bus" (APB). Since there are multiple of them (e.g. APB1 and APB2),
+ * you have to map each timer to the APB it is connected to: 
+ */
+#define STA_STM32_TIM_1_PCLK_IDX        1
+// ...
+
+// SPI to PCLK
+// Do the same for SPI...
+#define STA_STM32_SPI_1_PCLK_IDX        2
+
+// I2C to PCLK
+// Do the same for I2C...
+#define STA_STM32_I2C_1_PCLK_IDX        1
+
+// USART to PCLK
+// Do the same for USART...
+#define STA_STM32_USART_1_PCLK_IDX      2
+
+
+// HAL handle mappings
+//
+
+// TIM to PCLK#
+/**
+ * This section is straightforward. We only map the handles of the different timers
+ * to the corresponding indices we defined before. For example "htim1" is the handle
+ * for TIM1 which means that we need the following mapping: 
+ */
+#define STA_STM32_htim1_PCLK_IDX        STA_STM32_TIM_1_PCLK_IDX
+
+// SPI to PCLK
+// Do the same for SPI...
+#define STA_STM32_hspi1_PCLK_IDX        STA_STM32_SPI_1_PCLK_IDX
+
+// I2C to PCLK
+// Do the same for I2C...
+#define STA_STM32_hi2c1_PCLK_IDX        STA_STM32_I2C_1_PCLK_IDX
+
+// USART to PCLK
+// Do the same for USART...
+#define STA_STM32_husart1_PCLK_IDX      STA_STM32_USART_1_PCLK_IDX
+
+// Aaaaaaand we're done!
+
+#endif // STA_CORE_STM32_MCU_TEMPLATE_HPP