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@CarlWachter
2024-01-06 17:17:40 +01:00
committed by CarlWachter
parent b3ed26e288
commit 16b9e6135c
26 changed files with 331 additions and 306 deletions
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6
include/sta/devices/arduino/gpio_pin.hpp
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@@ -15,11 +15,15 @@
namespace sta
{
/**
* @brief A wrapper class for Arduino GPIO pins.
*
* @ingroup sta_core_arduino
*/
class ArduinoGpioPin : public GpioPin
{
public:
/**
* @param port GPIO port
* @param pin Pin index
*/
ArduinoGpioPin(uint16_t pin);

6
include/sta/devices/arduino/hal.hpp
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@@ -5,4 +5,10 @@
#include<Wire.h>
#include<SPI.h>
/**
* @defgroup sta_core_arduino Arduino
* @ingroup sta_core_platforms
* @brief Modules implemented for the Arduino platform.
*/
#endif // STA_CORE_ARDUINO_HAL_HPP

16
include/sta/devices/raspi/gpio_pin.hpp
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@@ -20,6 +20,11 @@ namespace sta
GPIO_INPUT
};
/**
* @brief A wrapper class for Raspi GPIO pins.
*
* @ingroup sta_core_raspi
*/
class RaspiGpioPin : public GpioPin
{
public:
@@ -29,10 +34,21 @@ namespace sta
*/
RaspiGpioPin(uint8_t pin, GpioMode mode);
/**
* @brief Set the state of the GPIO pin.
*
* @param state The state of the GPIO pin. Either HIGH or LOW
*/
void setState(GpioPinState state) override;
/**
* @brief Get the state of the GPIO pin.
*
* @return The state of the GPIO pin. Either HIGH or LOW
*/
GpioPinState getState() override;
/// @brief Dummy GPIO pin
static RaspiGpioPin * DUMMY_GPIO;
private:

6
include/sta/devices/raspi/hal.hpp
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@@ -5,4 +5,10 @@
#include <stdio.h>
#include <sys/ioctl.h>
/**
* @defgroup sta_core_raspi Raspi
* @ingroup sta_core_platforms
* @brief Modules implemented for the Raspi platform.
*/
#endif //STA_CORE_RASPI_HAL_HPP

12
include/sta/devices/stm32/adc.hpp
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@@ -13,6 +13,11 @@
namespace sta
{
/**
* @brief A wrapper class for the STM32 ADC peripheral.
*
* @ingroup sta_core_stm32
*/
class STM32ADC
{
public:
@@ -27,12 +32,17 @@ namespace sta
void start();
/**
* @brief
* @brief Polls for the converted analog signal.
*
* @param timeout
*/
void poll(uint32_t timeout);
/**
* @brief Get the value of the converted analog signal.
*
* @return uint32_t
*/
uint32_t getValue();
private:
ADC_HandleTypeDef * handle_;

3
include/sta/devices/stm32/bus/spi.hpp
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@@ -49,6 +49,9 @@ namespace sta
class STM32SPI : public SPI
{
public:
/**
* @brief Handle and corresponding peripheral clock frequency.
*/
struct Info
{
SPI_HandleTypeDef * handle; /**< STM32 HAL handle */

2
include/sta/devices/stm32/bus/uart.hpp
View File

@@ -40,6 +40,8 @@ namespace sta
public:
/**
* @param handle STM32 HAL handle
* @param settings UART settings
* @param mutex Mutex for thread safety
*/
STM32UART(UART_HandleTypeDef * handle, UARTSettings & settings, Mutex * mutex);

2
include/sta/devices/stm32/can.hpp
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@@ -12,8 +12,6 @@
* @defgroup sta_core_stm32_can CAN
* @ingroup sta_core_stm32
* @brief STM32 CAN module.
*
* Check @ref stm32BuildConfig for configuration options.
*/
// Only enable module on STM32 platform w/ HAL CAN module enabled

112
include/sta/devices/stm32/mcu/STM32F407xx.hpp
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@@ -1,6 +1,13 @@
#ifndef STA_CORE_STM32_MCU_STM32F407xx_HPP
#define STA_CORE_STM32_MCU_STM32F407xx_HPP
/**
* @defgroup sta_core_stm32_mcu_stm32f407xx STM32F407xx
* @ingroup sta_core_stm32_mcu
*
* @brief MCU configuration for the STM32F407xx family.
*/
#ifndef STM32F407xx
# error "MCU config incompatible"
#endif // STM32F407xx
@@ -16,76 +23,81 @@
# endif // STA_STM32_SWD_USART_IDX
#endif // STA_STM32_SWD_USART_IDX
/**
* @ingroup sta_core_stm32_mcu_stm32f407xx
* @{
*/
// Peripheral clock mappings
//
// TIM to PCLK
#define STA_STM32_TIM_1_PCLK_IDX 2
#define STA_STM32_TIM_2_PCLK_IDX 1
#define STA_STM32_TIM_3_PCLK_IDX 1
#define STA_STM32_TIM_4_PCLK_IDX 1
#define STA_STM32_TIM_5_PCLK_IDX 1
#define STA_STM32_TIM_6_PCLK_IDX 1
#define STA_STM32_TIM_7_PCLK_IDX 1
#define STA_STM32_TIM_8_PCLK_IDX 2
#define STA_STM32_TIM_9_PCLK_IDX 2
#define STA_STM32_TIM_10_PCLK_IDX 2
#define STA_STM32_TIM_11_PCLK_IDX 2
#define STA_STM32_TIM_12_PCLK_IDX 1
#define STA_STM32_TIM_13_PCLK_IDX 1
#define STA_STM32_TIM_14_PCLK_IDX 1
#define STA_STM32_TIM_1_PCLK_IDX 2 /**< TIM1 to PCLK index */
#define STA_STM32_TIM_2_PCLK_IDX 1 /**< TIM2 to PCLK index */
#define STA_STM32_TIM_3_PCLK_IDX 1 /**< TIM3 to PCLK index */
#define STA_STM32_TIM_4_PCLK_IDX 1 /**< TIM4 to PCLK index */
#define STA_STM32_TIM_5_PCLK_IDX 1 /**< TIM5 to PCLK index */
#define STA_STM32_TIM_6_PCLK_IDX 1 /**< TIM6 to PCLK index */
#define STA_STM32_TIM_7_PCLK_IDX 1 /**< TIM7 to PCLK index */
#define STA_STM32_TIM_8_PCLK_IDX 2 /**< TIM8 to PCLK index */
#define STA_STM32_TIM_9_PCLK_IDX 2 /**< TIM9 to PCLK index */
#define STA_STM32_TIM_10_PCLK_IDX 2 /**< TIM10 to PCLK index */
#define STA_STM32_TIM_11_PCLK_IDX 2 /**< TIM11 to PCLK index */
#define STA_STM32_TIM_12_PCLK_IDX 1 /**< TIM12 to PCLK index */
#define STA_STM32_TIM_13_PCLK_IDX 1 /**< TIM13 to PCLK index */
#define STA_STM32_TIM_14_PCLK_IDX 1 /**< TIM14 to PCLK index */
// SPI to PCLK
#define STA_STM32_SPI_1_PCLK_IDX 2
#define STA_STM32_SPI_2_PCLK_IDX 1
#define STA_STM32_SPI_3_PCLK_IDX 1
#define STA_STM32_SPI_1_PCLK_IDX 2 /**< SPI1 to PCLK index */
#define STA_STM32_SPI_2_PCLK_IDX 1 /**< SPI2 to PCLK index */
#define STA_STM32_SPI_3_PCLK_IDX 1 /**< SPI3 to PCLK index */
// I2C to PCLK
#define STA_STM32_I2C_1_PCLK_IDX 1
#define STA_STM32_I2C_2_PCLK_IDX 1
#define STA_STM32_I2C_3_PCLK_IDX 1
#define STA_STM32_I2C_1_PCLK_IDX 1 /**< I2C1 to PCLK index */
#define STA_STM32_I2C_2_PCLK_IDX 1 /**< I2C2 to PCLK index */
#define STA_STM32_I2C_3_PCLK_IDX 1 /**< I2C3 to PCLK index */
// USART to PCLK
#define STA_STM32_USART_1_PCLK_IDX 2
#define STA_STM32_USART_2_PCLK_IDX 1
#define STA_STM32_USART_3_PCLK_IDX 1
#define STA_STM32_USART_6_PCLK_IDX 2
#define STA_STM32_USART_1_PCLK_IDX 2 /**< USART1 to PCLK index */
#define STA_STM32_USART_2_PCLK_IDX 1 /**< USART2 to PCLK index */
#define STA_STM32_USART_3_PCLK_IDX 1 /**< USART3 to PCLK index */
#define STA_STM32_USART_6_PCLK_IDX 2 /**< USART6 to PCLK index */
// HAL handle mappings
//
#define STA_STM32_htim1_PCLK_IDX STA_STM32_TIM_1_PCLK_IDX
#define STA_STM32_htim2_PCLK_IDX STA_STM32_TIM_2_PCLK_IDX
#define STA_STM32_htim3_PCLK_IDX STA_STM32_TIM_3_PCLK_IDX
#define STA_STM32_htim4_PCLK_IDX STA_STM32_TIM_4_PCLK_IDX
#define STA_STM32_htim5_PCLK_IDX STA_STM32_TIM_5_PCLK_IDX
#define STA_STM32_htim6_PCLK_IDX STA_STM32_TIM_6_PCLK_IDX
#define STA_STM32_htim7_PCLK_IDX STA_STM32_TIM_7_PCLK_IDX
#define STA_STM32_htim8_PCLK_IDX STA_STM32_TIM_8_PCLK_IDX
#define STA_STM32_htim9_PCLK_IDX STA_STM32_TIM_9_PCLK_IDX
#define STA_STM32_htim10_PCLK_IDX STA_STM32_TIM_10_PCLK_IDX
#define STA_STM32_htim11_PCLK_IDX STA_STM32_TIM_11_PCLK_IDX
#define STA_STM32_htim12_PCLK_IDX STA_STM32_TIM_12_PCLK_IDX
#define STA_STM32_htim13_PCLK_IDX STA_STM32_TIM_13_PCLK_IDX
#define STA_STM32_htim1_PCLK_IDX STA_STM32_TIM_1_PCLK_IDX /**< Mapping for HAL TIM1 to PCLK index */
#define STA_STM32_htim2_PCLK_IDX STA_STM32_TIM_2_PCLK_IDX /**< Mapping for HAL TIM2 to PCLK index */
#define STA_STM32_htim3_PCLK_IDX STA_STM32_TIM_3_PCLK_IDX /**< Mapping for HAL TIM3 to PCLK index */
#define STA_STM32_htim4_PCLK_IDX STA_STM32_TIM_4_PCLK_IDX /**< Mapping for HAL TIM4 to PCLK index */
#define STA_STM32_htim5_PCLK_IDX STA_STM32_TIM_5_PCLK_IDX /**< Mapping for HAL TIM5 to PCLK index */
#define STA_STM32_htim6_PCLK_IDX STA_STM32_TIM_6_PCLK_IDX /**< Mapping for HAL TIM6 to PCLK index */
#define STA_STM32_htim7_PCLK_IDX STA_STM32_TIM_7_PCLK_IDX /**< Mapping for HAL TIM7 to PCLK index */
#define STA_STM32_htim8_PCLK_IDX STA_STM32_TIM_8_PCLK_IDX /**< Mapping for HAL TIM8 to PCLK index */
#define STA_STM32_htim9_PCLK_IDX STA_STM32_TIM_9_PCLK_IDX /**< Mapping for HAL TIM9 to PCLK index */
#define STA_STM32_htim10_PCLK_IDX STA_STM32_TIM_10_PCLK_IDX /**< Mapping for HAL TIM10 to PCLK index */
#define STA_STM32_htim11_PCLK_IDX STA_STM32_TIM_11_PCLK_IDX /**< Mapping for HAL TIM11 to PCLK index */
#define STA_STM32_htim12_PCLK_IDX STA_STM32_TIM_12_PCLK_IDX /**< Mapping for HAL TIM12 to PCLK index */
#define STA_STM32_htim13_PCLK_IDX STA_STM32_TIM_13_PCLK_IDX /**< Mapping for HAL TIM13 to PCLK index */
// SPI to PCLK
#define STA_STM32_hspi1_PCLK_IDX STA_STM32_SPI_1_PCLK_IDX
#define STA_STM32_hspi2_PCLK_IDX STA_STM32_SPI_2_PCLK_IDX
#define STA_STM32_hspi3_PCLK_IDX STA_STM32_SPI_3_PCLK_IDX
#define STA_STM32_hspi4_PCLK_IDX STA_STM32_SPI_4_PCLK_IDX
#define STA_STM32_hspi5_PCLK_IDX STA_STM32_SPI_5_PCLK_IDX
#define STA_STM32_hspi1_PCLK_IDX STA_STM32_SPI_1_PCLK_IDX /**< Mapping for HAL SPI1 to PCLK index */
#define STA_STM32_hspi2_PCLK_IDX STA_STM32_SPI_2_PCLK_IDX /**< Mapping for HAL SPI2 to PCLK index */
#define STA_STM32_hspi3_PCLK_IDX STA_STM32_SPI_3_PCLK_IDX /**< Mapping for HAL SPI3 to PCLK index */
#define STA_STM32_hspi4_PCLK_IDX STA_STM32_SPI_4_PCLK_IDX /**< Mapping for HAL SPI4 to PCLK index */
#define STA_STM32_hspi5_PCLK_IDX STA_STM32_SPI_5_PCLK_IDX /**< Mapping for HAL SPI5 to PCLK index */
// I2C to PCLK
#define STA_STM32_hi2c1_PCLK_IDX STA_STM32_I2C_1_PCLK_IDX
#define STA_STM32_hi2c2_PCLK_IDX STA_STM32_I2C_2_PCLK_IDX
#define STA_STM32_h12c3_PCLK_IDX STA_STM32_I2C_3_PCLK_IDX
#define STA_STM32_hi2c1_PCLK_IDX STA_STM32_I2C_1_PCLK_IDX /**< Mapping for HAL I2C1 to PCLK index */
#define STA_STM32_hi2c2_PCLK_IDX STA_STM32_I2C_2_PCLK_IDX /**< Mapping for HAL I2C2 to PCLK index */
#define STA_STM32_h12c3_PCLK_IDX STA_STM32_I2C_3_PCLK_IDX /**< Mapping for HAL I2C3 to PCLK index */
// USART to PCLK
#define STA_STM32_husart1_PCLK_IDX STA_STM32_USART_1_PCLK_IDX
#define STA_STM32_husart2_PCLK_IDX STA_STM32_USART_2_PCLK_IDX
#define STA_STM32_husart3_PCLK_IDX STA_STM32_USART_3_PCLK_IDX
#define STA_STM32_husart6_PCLK_IDX STA_STM32_USART_6_PCLK_IDX
#define STA_STM32_husart1_PCLK_IDX STA_STM32_USART_1_PCLK_IDX /**< Mapping for HAL USART1 to PCLK index */
#define STA_STM32_husart2_PCLK_IDX STA_STM32_USART_2_PCLK_IDX /**< Mapping for HAL USART2 to PCLK index */
#define STA_STM32_husart3_PCLK_IDX STA_STM32_USART_3_PCLK_IDX /**< Mapping for HAL USART3 to PCLK index */
#define STA_STM32_husart6_PCLK_IDX STA_STM32_USART_6_PCLK_IDX /**< Mapping for HAL USART6 to PCLK index */
/** @} */
#endif // STA_CORE_STM32_MCU_STM32F407xx_HPP

87
include/sta/devices/stm32/mcu/STM32F411xE.hpp
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@@ -5,6 +5,11 @@
#ifndef STA_CORE_STM32_MCU_STM32F411xE_HPP
#define STA_CORE_STM32_MCU_STM32F411xE_HPP
/**
* @defgroup sta_core_stm32_mcu_stm32f411xe STM32F411xE
* @ingroup sta_core_stm32_mcu
* @brief Configuration for STM32F411xE family.
*/
#ifndef STM32F411xE
# error "MCU config incompatible"
@@ -13,67 +18,71 @@
#include <sta/devices/stm32/mcu/common.hpp>
/**
* @ingroup sta_core_stm32_mcu_stm32f411xe
* @{
*/
// Peripheral clock mappings
//
// TIM to PCLK
#define STA_STM32_TIM_1_PCLK_IDX 2
#define STA_STM32_TIM_2_PCLK_IDX 1
#define STA_STM32_TIM_3_PCLK_IDX 1
#define STA_STM32_TIM_4_PCLK_IDX 1
#define STA_STM32_TIM_5_PCLK_IDX 1
#define STA_STM32_TIM_9_PCLK_IDX 2
#define STA_STM32_TIM_10_PCLK_IDX 2
#define STA_STM32_TIM_11_PCLK_IDX 2
#define STA_STM32_TIM_1_PCLK_IDX 2 /**< TIM1 to PCLK index 2 */
#define STA_STM32_TIM_2_PCLK_IDX 1 /**< TIM2 to PCLK index 1 */
#define STA_STM32_TIM_3_PCLK_IDX 1 /**< TIM3 to PCLK index 1 */
#define STA_STM32_TIM_4_PCLK_IDX 1 /**< TIM4 to PCLK index 1 */
#define STA_STM32_TIM_5_PCLK_IDX 1 /**< TIM5 to PCLK index 1 */
#define STA_STM32_TIM_9_PCLK_IDX 2 /**< TIM9 to PCLK index 2 */
#define STA_STM32_TIM_10_PCLK_IDX 2 /**< TIM10 to PCLK index 2 */
#define STA_STM32_TIM_11_PCLK_IDX 2 /**< TIM11 to PCLK index 2 */
// SPI to PCLK
#define STA_STM32_SPI_1_PCLK_IDX 2
#define STA_STM32_SPI_2_PCLK_IDX 1
#define STA_STM32_SPI_3_PCLK_IDX 1
#define STA_STM32_SPI_4_PCLK_IDX 2
#define STA_STM32_SPI_5_PCLK_IDX 2
#define STA_STM32_SPI_1_PCLK_IDX 2 /**< SPI1 to PCLK index 2 */
#define STA_STM32_SPI_2_PCLK_IDX 1 /**< SPI2 to PCLK index 1 */
#define STA_STM32_SPI_3_PCLK_IDX 1 /**< SPI3 to PCLK index 1 */
#define STA_STM32_SPI_4_PCLK_IDX 2 /**< SPI4 to PCLK index 2 */
#define STA_STM32_SPI_5_PCLK_IDX 2 /**< SPI5 to PCLK index 2 */
// I2C to PCLK
#define STA_STM32_I2C_1_PCLK_IDX 1
#define STA_STM32_I2C_2_PCLK_IDX 1
#define STA_STM32_I2C_3_PCLK_IDX 1
#define STA_STM32_I2C_1_PCLK_IDX 1 /**< I2C1 to PCLK index 1 */
#define STA_STM32_I2C_2_PCLK_IDX 1 /**< I2C2 to PCLK index 1 */
#define STA_STM32_I2C_3_PCLK_IDX 1 /**< I2C3 to PCLK index 1 */
// USART to PCLK
#define STA_STM32_USART_1_PCLK_IDX 2
#define STA_STM32_USART_2_PCLK_IDX 1
#define STA_STM32_USART_6_PCLK_IDX 2
#define STA_STM32_USART_1_PCLK_IDX 2 /**< USART1 to PCLK index 2 */
#define STA_STM32_USART_2_PCLK_IDX 1 /**< USART2 to PCLK index 1 */
#define STA_STM32_USART_6_PCLK_IDX 2 /**< USART6 to PCLK index 2 */
// HAL handle mappings
//
// TIM to PCLK
#define STA_STM32_htim1_PCLK_IDX STA_STM32_TIM_1_PCLK_IDX
#define STA_STM32_htim2_PCLK_IDX STA_STM32_TIM_2_PCLK_IDX
#define STA_STM32_htim3_PCLK_IDX STA_STM32_TIM_3_PCLK_IDX
#define STA_STM32_htim4_PCLK_IDX STA_STM32_TIM_4_PCLK_IDX
#define STA_STM32_htim5_PCLK_IDX STA_STM32_TIM_5_PCLK_IDX
#define STA_STM32_htim9_PCLK_IDX STA_STM32_TIM_9_PCLK_IDX
#define STA_STM32_htim10_PCLK_IDX STA_STM32_TIM_10_PCLK_IDX
#define STA_STM32_htim11_PCLK_IDX STA_STM32_TIM_11_PCLK_IDX
#define STA_STM32_htim1_PCLK_IDX STA_STM32_TIM_1_PCLK_IDX /**< HAL TIM1 to PCLK index */
#define STA_STM32_htim2_PCLK_IDX STA_STM32_TIM_2_PCLK_IDX /**< HAL TIM2 to PCLK index */
#define STA_STM32_htim3_PCLK_IDX STA_STM32_TIM_3_PCLK_IDX /**< HAL TIM3 to PCLK index */
#define STA_STM32_htim4_PCLK_IDX STA_STM32_TIM_4_PCLK_IDX /**< HAL TIM4 to PCLK index */
#define STA_STM32_htim5_PCLK_IDX STA_STM32_TIM_5_PCLK_IDX /**< HAL TIM5 to PCLK index */
#define STA_STM32_htim9_PCLK_IDX STA_STM32_TIM_9_PCLK_IDX /**< HAL TIM9 to PCLK index */
#define STA_STM32_htim10_PCLK_IDX STA_STM32_TIM_10_PCLK_IDX /**< HAL TIM10 to PCLK index */
#define STA_STM32_htim11_PCLK_IDX STA_STM32_TIM_11_PCLK_IDX /**< HAL TIM11 to PCLK index */
// SPI to PCLK
#define STA_STM32_hspi1_PCLK_IDX STA_STM32_SPI_1_PCLK_IDX
#define STA_STM32_hspi2_PCLK_IDX STA_STM32_SPI_2_PCLK_IDX
#define STA_STM32_hspi3_PCLK_IDX STA_STM32_SPI_3_PCLK_IDX
#define STA_STM32_hspi4_PCLK_IDX STA_STM32_SPI_4_PCLK_IDX
#define STA_STM32_hspi5_PCLK_IDX STA_STM32_SPI_5_PCLK_IDX
#define STA_STM32_hspi1_PCLK_IDX STA_STM32_SPI_1_PCLK_IDX /**< HAL SPI1 to PCLK index */
#define STA_STM32_hspi2_PCLK_IDX STA_STM32_SPI_2_PCLK_IDX /**< HAL SPI2 to PCLK index */
#define STA_STM32_hspi3_PCLK_IDX STA_STM32_SPI_3_PCLK_IDX /**< HAL SPI3 to PCLK index */
#define STA_STM32_hspi4_PCLK_IDX STA_STM32_SPI_4_PCLK_IDX /**< HAL SPI4 to PCLK index */
#define STA_STM32_hspi5_PCLK_IDX STA_STM32_SPI_5_PCLK_IDX /**< HAL SPI5 to PCLK index */
// I2C to PCLK
#define STA_STM32_hi2c1_PCLK_IDX STA_STM32_I2C_1_PCLK_IDX
#define STA_STM32_hi2c2_PCLK_IDX STA_STM32_I2C_2_PCLK_IDX
#define STA_STM32_h12c3_PCLK_IDX STA_STM32_I2C_3_PCLK_IDX
#define STA_STM32_hi2c1_PCLK_IDX STA_STM32_I2C_1_PCLK_IDX /**< HAL I2C1 to PCLK index */
#define STA_STM32_hi2c2_PCLK_IDX STA_STM32_I2C_2_PCLK_IDX /**< HAL I2C2 to PCLK index */
#define STA_STM32_h12c3_PCLK_IDX STA_STM32_I2C_3_PCLK_IDX /**< HAL I2C3 to PCLK index */
// USART to PCLK
#define STA_STM32_husart1_PCLK_IDX STA_STM32_USART_1_PCLK_IDX
#define STA_STM32_husart2_PCLK_IDX STA_STM32_USART_2_PCLK_IDX
#define STA_STM32_husart6_PCLK_IDX STA_STM32_USART_6_PCLK_IDX
#define STA_STM32_husart1_PCLK_IDX STA_STM32_USART_1_PCLK_IDX /**< HAL USART1 to PCLK index */
#define STA_STM32_husart2_PCLK_IDX STA_STM32_USART_2_PCLK_IDX /**< HAL USART2 to PCLK index */
#define STA_STM32_husart6_PCLK_IDX STA_STM32_USART_6_PCLK_IDX /**< HAL USART6 to PCLK index */
/** @} */
#endif // STA_CORE_STM32_MCU_STM32F411xE_HPP

5
include/sta/devices/stm32/mcu/template.hpp
View File

@@ -1,6 +1,11 @@
#ifndef STA_CORE_STM32_MCU_TEMPLATE_HPP
#define STA_CORE_STM32_MCU_TEMPLATE_HPP
/**
* @defgroup sta_core_stm32_mcu STM32 MCUs
* @ingroup sta_core_stm32
*/
#ifndef STM32_YOUR_MCU_xx
# error "MCU config incompatible"
#endif // STM32_YOUR_MCU_xx

5
include/sta/devices/template/custom_printable.hpp
View File

@@ -9,6 +9,11 @@
namespace sta
{
/**
* @brief A custom printable class.
*
* @ingroup sta_core
*/
class CustomPrintable : public Printable
{
public:

2
include/sta/devices/template/delay.hpp
View File

@@ -1,6 +1,6 @@
/**
* @file delay.hpp
* @author <your name> (<you>@<your_domain>.com)
* @author [your name] ([you]@[your_domain].com)
* @brief
* @version 0.1
* @date 2023-06-13