Modified config.hpp + enabled UART + added startUpExtras

This commit is contained in:
dario
2023-08-30 22:14:39 +02:00
parent 7c46e30161
commit d7d80c2288
7 changed files with 77 additions and 11 deletions

View File

@@ -2,7 +2,8 @@
CAD.formats=
CAD.pinconfig=
CAD.provider=
FREERTOS.IPParameters=Tasks01,configUSE_NEWLIB_REENTRANT,configRECORD_STACK_HIGH_ADDRESS,configCHECK_FOR_STACK_OVERFLOW
FREERTOS.IPParameters=Tasks01,configUSE_NEWLIB_REENTRANT,configRECORD_STACK_HIGH_ADDRESS,configCHECK_FOR_STACK_OVERFLOW,Mutexes01
FREERTOS.Mutexes01=uartMutex,Static,uartMutex_cb
FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL
FREERTOS.configCHECK_FOR_STACK_OVERFLOW=1
FREERTOS.configRECORD_STACK_HIGH_ADDRESS=1
@@ -74,7 +75,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=STM32CubeIDE
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USART2_UART_Init-USART2-false-HAL-true
RCC.AHBFreq_Value=16000000
RCC.APB1Freq_Value=16000000
RCC.APB2Freq_Value=16000000
@@ -101,4 +102,5 @@ USART2.VirtualMode=VM_ASYNC
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
board=custom
rtos.0.ip=FREERTOS
isbadioc=false