/** * @brief Configuration for STM32F411xE family. */ #ifndef STA_MCU_STM32F411xE_HPP #define STA_MCU_STM32F411xE_HPP #ifndef STM32F411xE # error "MCU config incompatible" #endif // !STM32F411xE #include // Peripheral clock mappings // // TIM to PCLK #define STA_TIM_1_PCLK_IDX 2 #define STA_TIM_2_PCLK_IDX 1 #define STA_TIM_3_PCLK_IDX 1 #define STA_TIM_4_PCLK_IDX 1 #define STA_TIM_5_PCLK_IDX 1 #define STA_TIM_9_PCLK_IDX 2 #define STA_TIM_10_PCLK_IDX 2 #define STA_TIM_11_PCLK_IDX 2 // SPI to PCLK #define STA_SPI_1_PCLK_IDX 2 #define STA_SPI_2_PCLK_IDX 1 #define STA_SPI_3_PCLK_IDX 1 #define STA_SPI_4_PCLK_IDX 2 #define STA_SPI_5_PCLK_IDX 2 // I2C to PCLK #define STA_I2C_1_PCLK_IDX 1 #define STA_I2C_2_PCLK_IDX 1 #define STA_I2C_3_PCLK_IDX 1 // USART to PCLK #define STA_USART_1_PCLK_IDX 2 #define STA_USART_2_PCLK_IDX 1 #define STA_USART_6_PCLK_IDX 2 // HAL handle mappings // #define STA_HAL_htim1_PCLK_IDX STA_TIM_1_PCLK_IDX #define STA_HAL_htim2_PCLK_IDX STA_TIM_2_PCLK_IDX #define STA_HAL_htim3_PCLK_IDX STA_TIM_3_PCLK_IDX #define STA_HAL_htim4_PCLK_IDX STA_TIM_4_PCLK_IDX #define STA_HAL_htim5_PCLK_IDX STA_TIM_5_PCLK_IDX #define STA_HAL_htim9_PCLK_IDX STA_TIM_9_PCLK_IDX #define STA_HAL_htim10_PCLK_IDX STA_TIM_10_PCLK_IDX #define STA_HAL_htim11_PCLK_IDX STA_TIM_11_PCLK_IDX // SPI to PCLK #define STA_HAL_hspi1_PCLK_IDX STA_SPI_1_PCLK_IDX #define STA_HAL_hspi2_PCLK_IDX STA_SPI_2_PCLK_IDX #define STA_HAL_hspi3_PCLK_IDX STA_SPI_3_PCLK_IDX #define STA_HAL_hspi4_PCLK_IDX STA_SPI_4_PCLK_IDX #define STA_HAL_hspi5_PCLK_IDX STA_SPI_5_PCLK_IDX // I2C to PCLK #define STA_HAL_hi2c1_PCLK_IDX STA_I2C_1_PCLK_IDX #define STA_HAL_hi2c2_PCLK_IDX STA_I2C_2_PCLK_IDX #define STA_HAL_h12c3_PCLK_IDX STA_I2C_3_PCLK_IDX // USART to PCLK #define STA_HAL_husart1_PCLK_IDX STA_USART_1_PCLK_IDX #define STA_HAL_husart2_PCLK_IDX STA_USART_2_PCLK_IDX #define STA_HAL_husart6_PCLK_IDX STA_USART_6_PCLK_IDX #endif // STA_MCU_STM32F411xE_HPP