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Completed getPendingRxFifos
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@ -80,7 +80,7 @@ namespace sta
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void disableFilter(uint8_t idx) override;
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void disableFilter(uint8_t idx) override;
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void clearFilters() override;
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void clearFilters() override;
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// TODO
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// Return pending RX FIFOs as iterable container
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CanPendingRxFifos getPendingRxFifos() override;
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CanPendingRxFifos getPendingRxFifos() override;
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// Const getters
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// Const getters
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@ -170,13 +170,22 @@ namespace sta
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}
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}
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CanPendingRxFifos STM32CanController::getPendingRxFifos(){
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CanPendingRxFifos STM32CanController::getPendingRxFifos(){
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CanPendingRxFifos pendingFifos(42, 3);
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// Example implementation:
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//pendingFifos.fifo0Pending = HAL_CAN_GetRxFifoFillLevel(handle_, CAN_RX_FIFO0) != 0;
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//pendingFifos.fifo1Pending = HAL_CAN_GetRxFifoFillLevel(handle_, CAN_RX_FIFO1) != 0;
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return pendingFifos;
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uint32_t rxFlags = 0;
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// Conditions to set the least significant bits
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if (HAL_CAN_GetRxFifoFillLevel(handle_, CAN_RX_FIFO0) != 0) {
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// Set the first least significant bit
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rxFlags |= 0x01; // 0x01 is 00000001 in binary (LSB set, others cleared)
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}
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if (HAL_CAN_GetRxFifoFillLevel(handle_, CAN_RX_FIFO1) != 0) {
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// Set the second least significant bit
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rxFlags |= 0x02; // 0x02 is 00000010 in binary (2nd LSB set, others cleared)
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}
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return CanPendingRxFifos(rxFlags, MAX_FIFO_COUNT);;
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}
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}
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uint8_t STM32CanController::maxFilterCount() const{
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uint8_t STM32CanController::maxFilterCount() const{
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