352 lines
8.7 KiB
C
352 lines
8.7 KiB
C
/*
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* Copyright © 2008 Keith Packard <keithp@keithp.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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*/
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#include "ccdbg.h"
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/* From SWRA124 section 3.1.6 */
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static uint8_t flash_page[] = {
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MOV_direct_data, P1DIR, 0x02,
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MOV_direct_data, P1, 0xFF,
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MOV_direct_data, FADDRH, 0,
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#define FLASH_ADDR_HIGH 8
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MOV_direct_data, FADDRL, 0,
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#define FLASH_ADDR_LOW 11
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MOV_DPTR_data16, 0, 0,
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#define RAM_ADDR_HIGH 13
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#define RAM_ADDR_LOW 14
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MOV_Rn_data(7), 0,
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#define FLASH_WORDS_HIGH 16
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MOV_Rn_data(6), 0,
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#define FLASH_WORDS_LOW 18
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MOV_direct_data, FWT, 0x20,
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#define FLASH_TIMING 21
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MOV_direct_data, FCTL, FCTL_ERASE,
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/* eraseWaitLoop: */
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MOV_A_direct, FCTL,
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JB, ACC(FCTL_BUSY_BIT), 0xfb,
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MOV_direct_data, P1, 0xfd,
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MOV_direct_data, FCTL, FCTL_WRITE,
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/* writeLoop: */
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MOV_Rn_data(5), 2,
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/* writeWordLoop: */
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MOVX_A_atDPTR,
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INC_DPTR,
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MOV_direct_A, FWDATA,
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DJNZ_Rn_rel(5), 0xfa, /* writeWordLoop */
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/* writeWaitLoop: */
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MOV_A_direct, FCTL,
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JB, ACC(FCTL_SWBSY_BIT), 0xfb, /* writeWaitLoop */
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DJNZ_Rn_rel(6), 0xf1, /* writeLoop */
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DJNZ_Rn_rel(7), 0xef, /* writeLoop */
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MOV_direct_data, P1DIR, 0x00,
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MOV_direct_data, P1, 0xFF,
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TRAP,
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};
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#define FLASH_RAM 0xf000
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#if 0
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static uint8_t flash_erase_page[] = {
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3, MOV_direct_data, FADDRH, 0,
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#define ERASE_PAGE_HIGH 3
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3, MOV_direct_data, FADDRL, 0,
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#define ERASE_PAGE_LOW 7
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3, MOV_direct_data, FWT, 0x2A,
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3, MOV_direct_data, FCTL, FCTL_ERASE,
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0
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};
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static uint8_t flash_read_control[] = {
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2, MOV_A_direct, FCTL,
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0
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};
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#endif
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#if 0
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static uint8_t flash_control_clear[] = {
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3, MOV_direct_data, FCTL, 0,
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2, MOV_A_direct, FCTL,
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0
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};
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#endif
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#if 0
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static uint8_t
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ccdbg_flash_erase_page(struct ccdbg *dbg, uint16_t addr)
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{
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uint16_t page_addr = addr >> 1;
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uint8_t status;
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uint8_t old[0x10], new[0x10];
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int i;
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ccdbg_read_memory(dbg, addr, old, 0x10);
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flash_erase_page[ERASE_PAGE_HIGH] = page_addr >> 8;
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flash_erase_page[ERASE_PAGE_LOW] = page_addr & 0xff;
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status = ccdbg_execute(dbg, flash_erase_page);
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ccdbg_debug(CC_DEBUG_FLASH, "erase status 0x%02x\n", status);
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do {
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status = ccdbg_execute(dbg, flash_read_control);
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ccdbg_debug(CC_DEBUG_FLASH, "fctl 0x%02x\n", status);
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} while (status & FCTL_BUSY);
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ccdbg_read_memory(dbg, addr, new, 0x10);
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for (i = 0; i < 0x10; i++)
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ccdbg_debug(CC_DEBUG_FLASH, "0x%02x -> 0x%02x\n", old[i], new[i]);
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status = ccdbg_execute(dbg, flash_control_clear);
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ccdbg_debug(CC_DEBUG_FLASH, "clear fctl 0x%02x\n", status);
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return 0;
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}
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#endif
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#if 0
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static uint8_t flash_write[] = {
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MOV_direct_data, P1DIR, 0x02,
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MOV_direct_data, P1, 0xFD,
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MOV_A_direct, FCTL,
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JB, ACC(FCTL_BUSY_BIT), 0xf1,
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MOV_direct_data, FCTL, 0x20,
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MOV_direct_data, FADDRH, 0,
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#define WRITE_PAGE_HIGH 16
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MOV_direct_data, FADDRL, 0,
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#define WRITE_PAGE_LOW 19
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MOV_direct_data, FCTL, FCTL_WRITE,
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MOV_direct_data, FWDATA, 0,
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#define WRITE_BYTE_0 25
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MOV_direct_data, FWDATA, 0,
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#define WRITE_BYTE_1 28
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MOV_A_direct, FCTL,
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JB, ACC(FCTL_SWBSY_BIT), 0xf1,
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MOV_direct_data, P1, 0xFF,
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TRAP,
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};
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#endif
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static uint8_t
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ccdbg_clock_init(struct ccdbg *dbg)
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{
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static uint8_t set_clkcon_fast[] = {
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3, MOV_direct_data, CLKCON, 0x00,
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0
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};
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static uint8_t get_sleep[] = {
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2, MOV_A_direct, SLEEP,
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0
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};
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uint8_t status;
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ccdbg_execute(dbg, set_clkcon_fast);
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do {
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status = ccdbg_execute(dbg, get_sleep);
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} while (!(status & 0x40));
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return 0;
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}
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#if 0
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static uint8_t
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ccdbg_flash_write_word(struct ccdbg *dbg, uint16_t addr, uint8_t data[2])
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{
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uint16_t page_addr = addr >> 1;
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uint8_t check[2];
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uint8_t status;
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int i;
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flash_write[WRITE_PAGE_HIGH] = page_addr >> 8;
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flash_write[WRITE_PAGE_LOW] = page_addr & 0xff;
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flash_write[WRITE_BYTE_0] = data[0];
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flash_write[WRITE_BYTE_1] = data[1];
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ccdbg_debug(CC_DEBUG_FLASH, "upload flash write\n");
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ccdbg_write_memory(dbg, 0xf000, flash_write, sizeof(flash_write));
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ccdbg_set_pc(dbg, 0xf000);
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ccdbg_resume(dbg);
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for (;;) {
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status = ccdbg_read_status(dbg);
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ccdbg_debug(CC_DEBUG_FLASH, "waiting for write 0x%02x\n", status);
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if ((status & CC_STATUS_CPU_HALTED) != 0)
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break;
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sleep (1);
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}
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status = ccdbg_execute(dbg, flash_control_clear);
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ccdbg_debug(CC_DEBUG_FLASH, "clear fctl 0x%02x\n", status);
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ccdbg_read_memory(dbg, addr, check, 2);
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for (i = 0; i < 2; i++)
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ccdbg_debug(CC_DEBUG_FLASH, "0x%02x : 0x%02x\n", data[i], check[i]);
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return 0;
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}
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#endif
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#define TIMERS_OFF 0x08
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#define DMA_PAUSE 0x04
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#define TIMER_SUSPEND 0x02
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#define SEL_FLASH_INFO_PAGE 0x01
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#if 0
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static uint8_t
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ccdbg_flash_lock(struct ccdbg *dbg, uint8_t lock)
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{
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uint8_t config;
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uint8_t bytes[2];
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uint8_t old[1], new[1];
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config = ccdbg_rd_config(dbg);
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ccdbg_wr_config(dbg, config|SEL_FLASH_INFO_PAGE);
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bytes[0] = lock;
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bytes[1] = 0;
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ccdbg_flash_erase_page(dbg, 0);
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ccdbg_read_memory(dbg, 0, old, 1);
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ccdbg_flash_write_word(dbg, 0, bytes);
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ccdbg_read_memory(dbg, 0, new, 1);
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ccdbg_debug(CC_DEBUG_FLASH, "flash lock 0x%02x -> 0x%02x\n", old[0], new[0]);
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ccdbg_wr_config(dbg, config & ~SEL_FLASH_INFO_PAGE);
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return 0;
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}
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#endif
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uint8_t
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ccdbg_flash_hex_image(struct ccdbg *dbg, struct ao_hex_image *image)
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{
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uint16_t flash_prog;
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uint16_t flash_len;
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uint8_t fwt;
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uint16_t flash_addr;
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uint16_t flash_word_addr;
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uint16_t flash_words;
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uint8_t flash_words_high, flash_words_low;
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uint16_t ram_addr;
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uint8_t status;
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uint16_t remain, this_time, start;
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uint8_t verify[0x400];
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int times;
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ccdbg_clock_init(dbg);
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if (image->address + image->length > 0x8000) {
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fprintf(stderr, "cannot flash image from 0x%04x to 0x%04x\n",
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image->address, image->address + image->length);
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return 1;
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}
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if (image->address & 0x3ff) {
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fprintf(stderr, "flash image must start on page boundary\n");
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return 1;
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}
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ram_addr = 0xf000;
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flash_prog = 0xf400;
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fwt = 0x20;
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flash_page[FLASH_TIMING] = fwt;
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ccdbg_debug(CC_DEBUG_FLASH, "Upload %d flash program bytes to 0x%04x\n",
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sizeof (flash_page), flash_prog);
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ccdbg_write_memory(dbg, flash_prog, flash_page, sizeof(flash_page));
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remain = image->length;
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start = 0;
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while (remain) {
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this_time = remain;
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if (this_time > 0x400)
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this_time = 0x400;
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ccdbg_debug(CC_DEBUG_FLASH, "Upload %d bytes at 0x%04x\n", this_time, ram_addr);
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ccdbg_write_memory(dbg, ram_addr, image->data + start, this_time);
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#if 0
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ccdbg_debug(CC_DEBUG_FLASH, "Verify %d bytes in ram\n", this_time);
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ccdbg_read_memory(dbg, ram_addr, verify, this_time);
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if (memcmp (image->data + start, verify, this_time) != 0) {
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fprintf(stderr, "ram verify failed\n");
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return 1;
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}
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#endif
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flash_addr = image->address + start;
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flash_word_addr = flash_addr >> 1;
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flash_len = this_time + (this_time & 1);
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flash_words = flash_len >> 1;
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flash_words_low = flash_words & 0xff;
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flash_words_high = flash_words >> 8;
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/* The flash code above is lame */
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if (flash_words_low)
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flash_words_high++;
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ccdbg_write_uint8(dbg, flash_prog + FLASH_ADDR_HIGH, flash_word_addr >> 8);
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ccdbg_write_uint8(dbg, flash_prog + FLASH_ADDR_LOW, flash_word_addr & 0xff);
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ccdbg_write_uint8(dbg, flash_prog + RAM_ADDR_HIGH, ram_addr >> 8);
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ccdbg_write_uint8(dbg, flash_prog + RAM_ADDR_LOW, ram_addr & 0xff);
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ccdbg_write_uint8(dbg, flash_prog + FLASH_WORDS_HIGH, flash_words_high);
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ccdbg_write_uint8(dbg, flash_prog + FLASH_WORDS_LOW, flash_words_low);
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ccdbg_set_pc(dbg, flash_prog);
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ccdbg_debug(CC_DEBUG_FLASH, "Flashing %d bytes at 0x%04x\n",
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this_time, flash_addr);
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status = ccdbg_resume(dbg);
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for (times = 0; times < 10; times++) {
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status = ccdbg_read_status(dbg);
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ccdbg_debug(CC_DEBUG_FLASH, ".");
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ccdbg_flush(CC_DEBUG_FLASH);
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if ((status & CC_STATUS_CPU_HALTED) != 0)
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break;
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usleep(10000);
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}
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ccdbg_debug(CC_DEBUG_FLASH, "\n");
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if (times == 10) {
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fprintf(stderr, "flash page timed out\n");
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return 1;
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}
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ccdbg_debug(CC_DEBUG_FLASH, "Verify %d bytes in flash\n", this_time);
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ccdbg_read_memory(dbg, flash_addr, verify, this_time);
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if (memcmp (image->data + start, verify, this_time) != 0) {
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int i;
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fprintf(stderr, "flash verify failed\n");
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for (i = 0; i < this_time; i++) {
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if (image->data[start + i] != verify[i])
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fprintf(stderr, "0x%04x: 0x%02x != 0x%02x\n",
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start + i, image->data[start+i], verify[i]);
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}
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return 1;
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}
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remain -= this_time;
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start += this_time;
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}
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return 0;
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}
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