mirror of
https://git.intern.spaceteamaachen.de/ALPAKA/CAN-Demo.git
synced 2025-06-09 18:55:58 +00:00
Just straight up can card module SW
This commit is contained in:
parent
8367127c62
commit
a23e573e64
@ -56,6 +56,7 @@
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<listOptionValue builtIn="false" value=""${workspace_loc:/CAN-Demo/Libs/rtos2-utils/include}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Libs/TACOS/include}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Libs/isotp/include}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Libs/driver-max31855}""/>
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</option>
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||||
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1002361924" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
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</tool>
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@ -77,6 +78,7 @@
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<listOptionValue builtIn="false" value=""${workspace_loc:/CAN-Demo/Libs/rtos2-utils/include}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Libs/TACOS/include}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Libs/isotp/include}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Libs/driver-max31855/include}""/>
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</option>
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||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.definedsymbols.2087867384" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
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<listOptionValue builtIn="false" value="DEBUG"/>
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|
2
.gitignore
vendored
2
.gitignore
vendored
@ -1,2 +1,4 @@
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Debug/*
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Debug/*/*
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Middlewares/Debug/*
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Middlewares/Debug/*/*
|
46
.mxproject
46
.mxproject
File diff suppressed because one or more lines are too long
@ -5,7 +5,7 @@
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<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
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||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
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||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-614993993494983921" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
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<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1080687771005896909" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
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<language-scope id="org.eclipse.cdt.core.gcc"/>
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<language-scope id="org.eclipse.cdt.core.g++"/>
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</provider>
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@ -16,7 +16,7 @@
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<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
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||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
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||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-614993993494983921" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
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<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1080687771005896909" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
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<language-scope id="org.eclipse.cdt.core.gcc"/>
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<language-scope id="org.eclipse.cdt.core.g++"/>
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</provider>
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|
@ -1,5 +1,5 @@
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635E684B79701B039C64EA45C3F84D30=44DBEC1DE4EBA9B0485911FBE58BFC80
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66BE74F758C12D739921AEA421D593D3=3
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8DF89ED150041C4CBC7CB9A9CAA90856=7B5B92F1162457C6ECACD202698061B0
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DC22A860405A8BF2F2C095E5B6529F12=7B5B92F1162457C6ECACD202698061B0
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8DF89ED150041C4CBC7CB9A9CAA90856=84EF3C290D485BA5E95DA5C0811FD966
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DC22A860405A8BF2F2C095E5B6529F12=84EF3C290D485BA5E95DA5C0811FD966
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eclipse.preferences.version=1
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|
32
App/Inc/tasks/thermo.hpp
Normal file
32
App/Inc/tasks/thermo.hpp
Normal file
@ -0,0 +1,32 @@
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/*
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* can_task.hpp
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*
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* Created on: 10 Dec 2023
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* Author: Carl
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*/
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#ifndef INC_TASKS_THERMO_HPP_
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#define INC_TASKS_THERMO_HPP_
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#include <sta/tacos/thread.hpp>
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#include <sta/devices/stm32/can.hpp>
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#include <gpio.h>
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#include <spi.h>
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namespace demo
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{
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class ThermoTask : public sta::tacos::TacosThread {
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public:
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ThermoTask();
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void init() override;
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void func() override;
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private:
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};
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} // namespace demo
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#endif /* INC_TASKS_THERMO_HPP_ */
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@ -7,11 +7,13 @@
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#include <sta/debug/debug.hpp>
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#include <tasks/can_task.hpp>
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#include <tasks/thermo.hpp>
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#include <sta/tacos/manager.hpp>
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#include <sta/tacos/statemachine.hpp>
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#include <sta/devices/stm32/gpio_pin.hpp>
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#include <sta/rtos/debug/heap_stats.hpp>
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#include <memory>
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extern CAN_HandleTypeDef hcan1;
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@ -31,6 +33,7 @@ namespace sta
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// The dummy task runs for state 0.
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Manager::instance()->registerThread(std::make_shared<demo::CanTask>("CAN SPAM", &hcan1), {0});
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Manager::instance()->registerThread(std::make_shared<demo::ThermoTask>(), {0});
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STA_DEBUG_PRINTF("The answer to everything is %d", 42);
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@ -38,7 +38,7 @@ namespace demo
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void CanTask::func()
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{
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//STA_DEBUG_HEAP_STATS();
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//canController.sendFrame(txHeader, payload);
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canController.sendFrame(txHeader, payload);
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//STA_DEBUG_HEAP_STATS();
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CAN_RxHeaderTypeDef rxHeader; //CAN Bus Receive Header
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64
App/Src/tasks/thermo.cpp
Normal file
64
App/Src/tasks/thermo.cpp
Normal file
@ -0,0 +1,64 @@
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/*
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* can_task.cpp
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*
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* Created on: 10 Dec 2023
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* Author: Carl
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*/
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#include <tasks/thermo.hpp>
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#include <sta/debug/debug.hpp>
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#include <sta/rtos/debug/heap_stats.hpp>
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#include <gpio.h>
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#include <spi.h>
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#include <sta/MAX31855.hpp>
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#include <sta/devices/stm32/bus/spi.hpp>
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#include <sta/rtos/mutex.hpp>
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#include <cmsis_os2.h>
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namespace demo
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{
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ThermoTask::ThermoTask()
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: TacosThread("Thermo", osPriorityNormal)
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{
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}
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void ThermoTask::init()
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{
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}
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void ThermoTask::func()
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{
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//STA_DEBUG_HEAP_STATS();
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//canController.sendFrame(txHeader, payload);
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//STA_DEBUG_HEAP_STATS();
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//fuck off other pins
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HAL_GPIO_WritePin(GPIOE,GPIO_PIN_12, GPIO_PIN_SET);
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HAL_GPIO_WritePin(GPIOB,GPIO_PIN_10, GPIO_PIN_SET);
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HAL_GPIO_WritePin(GPIOE,GPIO_PIN_15, GPIO_PIN_SET);
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HAL_GPIO_WritePin(GPIOE,GPIO_PIN_14, GPIO_PIN_SET);
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sta::STM32GpioPin cs_pin(GPIOE, GPIO_PIN_13);
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sta::RtosMutex mutex("spi2");
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sta::STM32SPI spi2_ptr(&hspi2, 16000000, &mutex);
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sta::STM32SPIDevice device_(&spi2_ptr, &cs_pin);
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sta::MAX31855 tc = sta::MAX31855(&device_); //create driver object
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tc.update(); // update internal values
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float temperature = tc.getTemp(); //read out temperature in degrees Celsius
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float referenceTemperature = tc.getReferenceTemp(); // read out reference temperature in degrees Celsius
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uint8_t status = tc.getStatus(); //read out status of the update
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HAL_Delay(1000);
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}
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} // namespace demo
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@ -40,7 +40,7 @@
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<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_txt_serial_number" value=""/>
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<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.watchdog_config" value="none"/>
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<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkenable_rtos" value="false"/>
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<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{"fVersion":1,"fItems":[{"fDisplayName":"Reset","fIsSuppressible":false,"fResetAttribute":"Software system reset","fResetStrategies":[{"fDisplayName":"Software system reset","fLaunchAttribute":"system_reset","fGdbCommands":["monitor reset\r\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Hardware reset","fLaunchAttribute":"hardware_reset","fGdbCommands":["monitor reset hardware\r\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Core reset","fLaunchAttribute":"core_reset","fGdbCommands":["monitor reset core\r\n"],"fCmdOptions":["-g"]},{"fDisplayName":"None","fLaunchAttribute":"no_reset","fGdbCommands":[],"fCmdOptions":["-g"]}],"fGdbCommandGroup":{"name":"Additional commands","commands":[]},"fStartApplication":true}]}"/>
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<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{"fVersion":1,"fItems":[{"fDisplayName":"Reset","fIsSuppressible":false,"fResetAttribute":"Software system reset","fResetStrategies":[{"fDisplayName":"Software system reset","fLaunchAttribute":"system_reset","fGdbCommands":["monitor reset\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Hardware reset","fLaunchAttribute":"hardware_reset","fGdbCommands":["monitor reset hardware\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Core reset","fLaunchAttribute":"core_reset","fGdbCommands":["monitor reset core\n"],"fCmdOptions":["-g"]},{"fDisplayName":"None","fLaunchAttribute":"no_reset","fGdbCommands":[],"fCmdOptions":["-g"]}],"fGdbCommandGroup":{"name":"Additional commands","commands":[]},"fStartApplication":true}]}"/>
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<booleanAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.enableRtosProxy" value="false"/>
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||||
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyCustomProperties" value=""/>
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||||
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyDriver" value="threadx"/>
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|
91
CAN-Demo.ioc
91
CAN-Demo.ioc
@ -26,36 +26,44 @@ Mcu.IP0=CAN1
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Mcu.IP1=FREERTOS
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Mcu.IP2=NVIC
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Mcu.IP3=RCC
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Mcu.IP4=SYS
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Mcu.IP5=USART1
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Mcu.IPNb=6
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Mcu.IP4=SPI2
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Mcu.IP5=SYS
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Mcu.IP6=USART1
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Mcu.IPNb=7
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Mcu.Name=STM32F407Z(E-G)Tx
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Mcu.Package=LQFP144
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Mcu.Pin0=PH0-OSC_IN
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Mcu.Pin1=PH1-OSC_OUT
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Mcu.Pin10=PD9
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Mcu.Pin11=PA9
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Mcu.Pin12=PA10
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Mcu.Pin13=PA11
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Mcu.Pin14=PA12
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Mcu.Pin15=PA13
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Mcu.Pin16=PA14
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Mcu.Pin17=PA15
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Mcu.Pin18=PC10
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Mcu.Pin19=PC11
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Mcu.Pin2=PA0-WKUP
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Mcu.Pin20=PC12
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Mcu.Pin21=PB3
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Mcu.Pin22=VP_FREERTOS_VS_CMSIS_V2
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Mcu.Pin23=VP_SYS_VS_tim1
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Mcu.Pin3=PA1
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Mcu.Pin4=PA2
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Mcu.Pin5=PA3
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Mcu.Pin6=PA6
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Mcu.Pin7=PB12
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Mcu.Pin8=PB13
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Mcu.Pin9=PD8
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Mcu.PinsNb=24
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Mcu.Pin10=PE14
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Mcu.Pin11=PE15
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Mcu.Pin12=PB10
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Mcu.Pin13=PB12
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Mcu.Pin14=PB13
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Mcu.Pin15=PB14
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Mcu.Pin16=PD8
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Mcu.Pin17=PD9
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Mcu.Pin18=PA9
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Mcu.Pin19=PA10
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Mcu.Pin2=PC3
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Mcu.Pin20=PA11
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Mcu.Pin21=PA12
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Mcu.Pin22=PA13
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Mcu.Pin23=PA14
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Mcu.Pin24=PA15
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Mcu.Pin25=PC10
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Mcu.Pin26=PC11
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Mcu.Pin27=PC12
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Mcu.Pin28=PB3
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Mcu.Pin29=VP_FREERTOS_VS_CMSIS_V2
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Mcu.Pin3=PA0-WKUP
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Mcu.Pin30=VP_SYS_VS_tim1
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Mcu.Pin4=PA1
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Mcu.Pin5=PA2
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Mcu.Pin6=PA3
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Mcu.Pin7=PA6
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Mcu.Pin8=PE12
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Mcu.Pin9=PE13
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Mcu.PinsNb=31
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Mcu.ThirdPartyNb=0
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Mcu.UserConstants=
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Mcu.UserName=STM32F407ZGTx
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@ -104,15 +112,19 @@ PA6.Locked=true
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PA6.Signal=GPIO_Output
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PA9.Mode=Asynchronous
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PA9.Signal=USART1_TX
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PB10.Locked=true
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PB10.Signal=GPIO_Output
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PB12.GPIOParameters=GPIO_Speed,PinState
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PB12.GPIO_Speed=GPIO_SPEED_FREQ_LOW
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PB12.Locked=true
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PB12.PinState=GPIO_PIN_RESET
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PB12.Signal=GPIO_Output
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PB13.GPIOParameters=PinState
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PB13.Locked=true
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PB13.PinState=GPIO_PIN_RESET
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PB13.Signal=GPIO_Output
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PB13.Mode=Full_Duplex_Master
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PB13.Signal=SPI2_SCK
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PB14.Locked=true
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PB14.Mode=Full_Duplex_Master
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PB14.Signal=SPI2_MISO
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PB3.Locked=true
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PB3.Signal=SYS_JTDO-SWO
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PC10.Locked=true
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@ -121,10 +133,24 @@ PC11.Locked=true
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PC11.Signal=SPI3_MISO
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PC12.Locked=true
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PC12.Signal=SPI3_MOSI
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PC3.Mode=Full_Duplex_Master
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PC3.Signal=SPI2_MOSI
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PD8.Locked=true
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PD8.Signal=GPIO_Output
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PD9.Locked=true
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PD9.Signal=GPIO_Output
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PE12.GPIOParameters=PinState
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PE12.Locked=true
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PE12.PinState=GPIO_PIN_SET
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PE12.Signal=GPIO_Output
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PE13.GPIOParameters=PinState
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PE13.Locked=true
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PE13.PinState=GPIO_PIN_RESET
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PE13.Signal=GPIO_Output
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PE14.Locked=true
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PE14.Signal=GPIO_Output
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PE15.Locked=true
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PE15.Signal=GPIO_Output
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PH0-OSC_IN.Locked=true
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PH0-OSC_IN.Mode=HSE-External-Oscillator
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PH0-OSC_IN.Signal=RCC_OSC_IN
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@ -162,7 +188,7 @@ ProjectManager.ToolChainLocation=
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||||
ProjectManager.UAScriptAfterPath=
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||||
ProjectManager.UAScriptBeforePath=
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||||
ProjectManager.UnderRoot=true
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_CAN1_Init-CAN1-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_CAN1_Init-CAN1-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_SPI2_Init-SPI2-false-HAL-true
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||||
RCC.48MHZClocksFreq_Value=32000000
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||||
RCC.AHBCLKDivider=RCC_SYSCLK_DIV4
|
||||
RCC.AHBFreq_Value=16000000
|
||||
@ -195,6 +221,11 @@ RCC.VCOI2SOutputFreq_Value=384000000
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||||
RCC.VCOInputFreq_Value=2000000
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||||
RCC.VCOOutputFreq_Value=128000000
|
||||
RCC.VcooutputI2S=192000000
|
||||
SPI2.CalculateBaudRate=8.0 MBits/s
|
||||
SPI2.Direction=SPI_DIRECTION_2LINES
|
||||
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
||||
SPI2.Mode=SPI_MODE_MASTER
|
||||
SPI2.VirtualType=VM_MASTER
|
||||
USART1.BaudRate=9600
|
||||
USART1.IPParameters=VirtualMode,BaudRate
|
||||
USART1.VirtualMode=VM_ASYNC
|
||||
|
52
Core/Inc/spi.h
Normal file
52
Core/Inc/spi.h
Normal file
@ -0,0 +1,52 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file spi.h
|
||||
* @brief This file contains all the function prototypes for
|
||||
* the spi.c file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2024 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __SPI_H__
|
||||
#define __SPI_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
extern SPI_HandleTypeDef hspi2;
|
||||
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
void MX_SPI2_Init(void);
|
||||
|
||||
/* USER CODE BEGIN Prototypes */
|
||||
|
||||
/* USER CODE END Prototypes */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SPI_H__ */
|
||||
|
@ -62,7 +62,7 @@
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
/* #define HAL_SD_MODULE_ENABLED */
|
||||
/* #define HAL_MMC_MODULE_ENABLED */
|
||||
/* #define HAL_SPI_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
/* #define HAL_USART_MODULE_ENABLED */
|
||||
|
@ -49,17 +49,24 @@ void MX_GPIO_Init(void)
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
|
||||
|GPIO_PIN_6, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12|GPIO_PIN_13, GPIO_PIN_RESET);
|
||||
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_12, GPIO_PIN_SET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_10|GPIO_PIN_12, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_8|GPIO_PIN_9, GPIO_PIN_RESET);
|
||||
@ -73,8 +80,15 @@ void MX_GPIO_Init(void)
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : PB12 PB13 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13;
|
||||
/*Configure GPIO pins : PE12 PE13 PE14 PE15 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : PB10 PB12 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_12;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
|
@ -20,6 +20,7 @@
|
||||
#include "main.h"
|
||||
#include "cmsis_os.h"
|
||||
#include "can.h"
|
||||
#include "spi.h"
|
||||
#include "usart.h"
|
||||
#include "gpio.h"
|
||||
|
||||
@ -100,6 +101,7 @@ int main(void)
|
||||
MX_GPIO_Init();
|
||||
MX_CAN1_Init();
|
||||
MX_USART1_UART_Init();
|
||||
MX_SPI2_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
/*txHeader.DLC = 8;
|
||||
|
129
Core/Src/spi.c
Normal file
129
Core/Src/spi.c
Normal file
@ -0,0 +1,129 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file spi.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of the SPI instances.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2024 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "spi.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
SPI_HandleTypeDef hspi2;
|
||||
|
||||
/* SPI2 init function */
|
||||
void MX_SPI2_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN SPI2_Init 0 */
|
||||
|
||||
/* USER CODE END SPI2_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN SPI2_Init 1 */
|
||||
|
||||
/* USER CODE END SPI2_Init 1 */
|
||||
hspi2.Instance = SPI2;
|
||||
hspi2.Init.Mode = SPI_MODE_MASTER;
|
||||
hspi2.Init.Direction = SPI_DIRECTION_2LINES;
|
||||
hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
|
||||
hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
|
||||
hspi2.Init.NSS = SPI_NSS_SOFT;
|
||||
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
|
||||
hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||
hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
|
||||
hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||||
hspi2.Init.CRCPolynomial = 10;
|
||||
if (HAL_SPI_Init(&hspi2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN SPI2_Init 2 */
|
||||
|
||||
/* USER CODE END SPI2_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(spiHandle->Instance==SPI2)
|
||||
{
|
||||
/* USER CODE BEGIN SPI2_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI2_MspInit 0 */
|
||||
/* SPI2 clock enable */
|
||||
__HAL_RCC_SPI2_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**SPI2 GPIO Configuration
|
||||
PC3 ------> SPI2_MOSI
|
||||
PB13 ------> SPI2_SCK
|
||||
PB14 ------> SPI2_MISO
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI2_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI2_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
|
||||
{
|
||||
|
||||
if(spiHandle->Instance==SPI2)
|
||||
{
|
||||
/* USER CODE BEGIN SPI2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI2_CLK_DISABLE();
|
||||
|
||||
/**SPI2 GPIO Configuration
|
||||
PC3 ------> SPI2_MOSI
|
||||
PB13 ------> SPI2_SCK
|
||||
PB14 ------> SPI2_MISO
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_3);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14);
|
||||
|
||||
/* USER CODE BEGIN SPI2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI2_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
@ -1,128 +1,128 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_timebase_tim.c
|
||||
* @brief HAL time base based on the hardware TIM.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2024 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal.h"
|
||||
#include "stm32f4xx_hal_tim.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
TIM_HandleTypeDef htim1;
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief This function configures the TIM1 as a time base source.
|
||||
* The time source is configured to have 1ms time base with a dedicated
|
||||
* Tick interrupt priority.
|
||||
* @note This function is called automatically at the beginning of program after
|
||||
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
|
||||
* @param TickPriority: Tick interrupt priority.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||||
{
|
||||
RCC_ClkInitTypeDef clkconfig;
|
||||
uint32_t uwTimclock = 0U;
|
||||
|
||||
uint32_t uwPrescalerValue = 0U;
|
||||
uint32_t pFLatency;
|
||||
HAL_StatusTypeDef status;
|
||||
|
||||
/* Enable TIM1 clock */
|
||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||
|
||||
/* Get clock configuration */
|
||||
HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
|
||||
|
||||
/* Compute TIM1 clock */
|
||||
uwTimclock = HAL_RCC_GetPCLK2Freq();
|
||||
|
||||
/* Compute the prescaler value to have TIM1 counter clock equal to 1MHz */
|
||||
uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
|
||||
|
||||
/* Initialize TIM1 */
|
||||
htim1.Instance = TIM1;
|
||||
|
||||
/* Initialize TIMx peripheral as follow:
|
||||
|
||||
+ Period = [(TIM1CLK/1000) - 1]. to have a (1/1000) s time base.
|
||||
+ Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
|
||||
+ ClockDivision = 0
|
||||
+ Counter direction = Up
|
||||
*/
|
||||
htim1.Init.Period = (1000000U / 1000U) - 1U;
|
||||
htim1.Init.Prescaler = uwPrescalerValue;
|
||||
htim1.Init.ClockDivision = 0;
|
||||
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
|
||||
status = HAL_TIM_Base_Init(&htim1);
|
||||
if (status == HAL_OK)
|
||||
{
|
||||
/* Start the TIM time Base generation in interrupt mode */
|
||||
status = HAL_TIM_Base_Start_IT(&htim1);
|
||||
if (status == HAL_OK)
|
||||
{
|
||||
/* Enable the TIM1 global Interrupt */
|
||||
HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
|
||||
/* Configure the SysTick IRQ priority */
|
||||
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
||||
{
|
||||
/* Configure the TIM IRQ priority */
|
||||
HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, TickPriority, 0U);
|
||||
uwTickPrio = TickPriority;
|
||||
}
|
||||
else
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Return function status */
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Suspend Tick increment.
|
||||
* @note Disable the tick increment by disabling TIM1 update interrupt.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SuspendTick(void)
|
||||
{
|
||||
/* Disable TIM1 update Interrupt */
|
||||
__HAL_TIM_DISABLE_IT(&htim1, TIM_IT_UPDATE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Resume Tick increment.
|
||||
* @note Enable the tick increment by Enabling TIM1 update interrupt.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ResumeTick(void)
|
||||
{
|
||||
/* Enable TIM1 Update interrupt */
|
||||
__HAL_TIM_ENABLE_IT(&htim1, TIM_IT_UPDATE);
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_timebase_tim.c
|
||||
* @brief HAL time base based on the hardware TIM.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2024 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal.h"
|
||||
#include "stm32f4xx_hal_tim.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
TIM_HandleTypeDef htim1;
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief This function configures the TIM1 as a time base source.
|
||||
* The time source is configured to have 1ms time base with a dedicated
|
||||
* Tick interrupt priority.
|
||||
* @note This function is called automatically at the beginning of program after
|
||||
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
|
||||
* @param TickPriority: Tick interrupt priority.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||||
{
|
||||
RCC_ClkInitTypeDef clkconfig;
|
||||
uint32_t uwTimclock = 0U;
|
||||
|
||||
uint32_t uwPrescalerValue = 0U;
|
||||
uint32_t pFLatency;
|
||||
HAL_StatusTypeDef status;
|
||||
|
||||
/* Enable TIM1 clock */
|
||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||
|
||||
/* Get clock configuration */
|
||||
HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
|
||||
|
||||
/* Compute TIM1 clock */
|
||||
uwTimclock = HAL_RCC_GetPCLK2Freq();
|
||||
|
||||
/* Compute the prescaler value to have TIM1 counter clock equal to 1MHz */
|
||||
uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
|
||||
|
||||
/* Initialize TIM1 */
|
||||
htim1.Instance = TIM1;
|
||||
|
||||
/* Initialize TIMx peripheral as follow:
|
||||
|
||||
+ Period = [(TIM1CLK/1000) - 1]. to have a (1/1000) s time base.
|
||||
+ Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
|
||||
+ ClockDivision = 0
|
||||
+ Counter direction = Up
|
||||
*/
|
||||
htim1.Init.Period = (1000000U / 1000U) - 1U;
|
||||
htim1.Init.Prescaler = uwPrescalerValue;
|
||||
htim1.Init.ClockDivision = 0;
|
||||
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
|
||||
status = HAL_TIM_Base_Init(&htim1);
|
||||
if (status == HAL_OK)
|
||||
{
|
||||
/* Start the TIM time Base generation in interrupt mode */
|
||||
status = HAL_TIM_Base_Start_IT(&htim1);
|
||||
if (status == HAL_OK)
|
||||
{
|
||||
/* Enable the TIM1 global Interrupt */
|
||||
HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
|
||||
/* Configure the SysTick IRQ priority */
|
||||
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
||||
{
|
||||
/* Configure the TIM IRQ priority */
|
||||
HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, TickPriority, 0U);
|
||||
uwTickPrio = TickPriority;
|
||||
}
|
||||
else
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Return function status */
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Suspend Tick increment.
|
||||
* @note Disable the tick increment by disabling TIM1 update interrupt.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SuspendTick(void)
|
||||
{
|
||||
/* Disable TIM1 update Interrupt */
|
||||
__HAL_TIM_DISABLE_IT(&htim1, TIM_IT_UPDATE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Resume Tick increment.
|
||||
* @note Enable the tick increment by Enabling TIM1 update interrupt.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ResumeTick(void)
|
||||
{
|
||||
/* Enable TIM1 Update interrupt */
|
||||
__HAL_TIM_ENABLE_IT(&htim1, TIM_IT_UPDATE);
|
||||
}
|
||||
|
||||
|
729
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h
Normal file
729
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h
Normal file
@ -0,0 +1,729 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_spi.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of SPI HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32F4xx_HAL_SPI_H
|
||||
#define STM32F4xx_HAL_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Types SPI Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SPI Configuration Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Mode; /*!< Specifies the SPI operating mode.
|
||||
This parameter can be a value of @ref SPI_Mode */
|
||||
|
||||
uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
|
||||
This parameter can be a value of @ref SPI_Direction */
|
||||
|
||||
uint32_t DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be a value of @ref SPI_Data_Size */
|
||||
|
||||
uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
|
||||
This parameter can be a value of @ref SPI_Clock_Polarity */
|
||||
|
||||
uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
|
||||
This parameter can be a value of @ref SPI_Clock_Phase */
|
||||
|
||||
uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be a value of @ref SPI_BaudRate_Prescaler
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set. */
|
||||
|
||||
uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
||||
This parameter can be a value of @ref SPI_MSB_LSB_transmission */
|
||||
|
||||
uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
|
||||
This parameter can be a value of @ref SPI_TI_mode */
|
||||
|
||||
uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
|
||||
This parameter can be a value of @ref SPI_CRC_Calculation */
|
||||
|
||||
uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
|
||||
This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */
|
||||
} SPI_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SPI State structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */
|
||||
HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
|
||||
HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
|
||||
HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */
|
||||
HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */
|
||||
} HAL_SPI_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI handle Structure definition
|
||||
*/
|
||||
typedef struct __SPI_HandleTypeDef
|
||||
{
|
||||
SPI_TypeDef *Instance; /*!< SPI registers base address */
|
||||
|
||||
SPI_InitTypeDef Init; /*!< SPI communication parameters */
|
||||
|
||||
uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
|
||||
|
||||
uint16_t TxXferSize; /*!< SPI Tx Transfer size */
|
||||
|
||||
__IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */
|
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */
|
||||
|
||||
uint16_t RxXferSize; /*!< SPI Rx Transfer size */
|
||||
|
||||
__IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */
|
||||
|
||||
void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */
|
||||
|
||||
void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */
|
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
|
||||
__IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< SPI Error code */
|
||||
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */
|
||||
void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */
|
||||
void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */
|
||||
void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */
|
||||
void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */
|
||||
void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */
|
||||
void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */
|
||||
void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */
|
||||
void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */
|
||||
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
} SPI_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
/**
|
||||
* @brief HAL SPI Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */
|
||||
HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */
|
||||
HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */
|
||||
HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */
|
||||
HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */
|
||||
HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */
|
||||
HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */
|
||||
HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */
|
||||
HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */
|
||||
HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */
|
||||
|
||||
} HAL_SPI_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SPI Callback pointer definition
|
||||
*/
|
||||
typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */
|
||||
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Constants SPI Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Error_Code SPI Error Code
|
||||
* @{
|
||||
*/
|
||||
#define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */
|
||||
#define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */
|
||||
#define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */
|
||||
#define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */
|
||||
#define HAL_SPI_ERROR_FRE (0x00000008U) /*!< FRE error */
|
||||
#define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
|
||||
#define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY Flag */
|
||||
#define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
#define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Mode SPI Mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_MODE_SLAVE (0x00000000U)
|
||||
#define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Direction SPI Direction Mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DIRECTION_2LINES (0x00000000U)
|
||||
#define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
|
||||
#define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Data_Size SPI Data Size
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DATASIZE_8BIT (0x00000000U)
|
||||
#define SPI_DATASIZE_16BIT SPI_CR1_DFF
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
|
||||
* @{
|
||||
*/
|
||||
#define SPI_POLARITY_LOW (0x00000000U)
|
||||
#define SPI_POLARITY_HIGH SPI_CR1_CPOL
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Phase SPI Clock Phase
|
||||
* @{
|
||||
*/
|
||||
#define SPI_PHASE_1EDGE (0x00000000U)
|
||||
#define SPI_PHASE_2EDGE SPI_CR1_CPHA
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Slave_Select_management SPI Slave Select Management
|
||||
* @{
|
||||
*/
|
||||
#define SPI_NSS_SOFT SPI_CR1_SSM
|
||||
#define SPI_NSS_HARD_INPUT (0x00000000U)
|
||||
#define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define SPI_BAUDRATEPRESCALER_2 (0x00000000U)
|
||||
#define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1)
|
||||
#define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2)
|
||||
#define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1)
|
||||
#define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FIRSTBIT_MSB (0x00000000U)
|
||||
#define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_TI_mode SPI TI Mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_TIMODE_DISABLE (0x00000000U)
|
||||
#define SPI_TIMODE_ENABLE SPI_CR2_FRF
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
|
||||
* @{
|
||||
*/
|
||||
#define SPI_CRCCALCULATION_DISABLE (0x00000000U)
|
||||
#define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
|
||||
* @{
|
||||
*/
|
||||
#define SPI_IT_TXE SPI_CR2_TXEIE
|
||||
#define SPI_IT_RXNE SPI_CR2_RXNEIE
|
||||
#define SPI_IT_ERR SPI_CR2_ERRIE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Flags_definition SPI Flags Definition
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
|
||||
#define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
|
||||
#define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
|
||||
#define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
|
||||
#define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
|
||||
#define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
|
||||
#define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
|
||||
#define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY | SPI_SR_CRCERR\
|
||||
| SPI_SR_MODF | SPI_SR_OVR | SPI_SR_FRE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Macros SPI Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset SPI handle state.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_SPI_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
|
||||
/** @brief Enable the specified SPI interrupts.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__ specifies the interrupt source to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
/** @brief Disable the specified SPI interrupts.
|
||||
* @param __HANDLE__ specifies the SPI handle.
|
||||
* This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__ specifies the interrupt source to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
/** @brief Check whether the specified SPI interrupt source is enabled or not.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__ specifies the SPI interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
|
||||
& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified SPI flag is set or not.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
|
||||
* @arg SPI_FLAG_TXE: Transmit buffer empty flag
|
||||
* @arg SPI_FLAG_CRCERR: CRC error flag
|
||||
* @arg SPI_FLAG_MODF: Mode fault flag
|
||||
* @arg SPI_FLAG_OVR: Overrun flag
|
||||
* @arg SPI_FLAG_BSY: Busy flag
|
||||
* @arg SPI_FLAG_FRE: Frame format error flag
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/** @brief Clear the SPI CRCERR pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
|
||||
|
||||
/** @brief Clear the SPI MODF pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg_modf = 0x00U; \
|
||||
tmpreg_modf = (__HANDLE__)->Instance->SR; \
|
||||
CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \
|
||||
UNUSED(tmpreg_modf); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Clear the SPI OVR pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg_ovr = 0x00U; \
|
||||
tmpreg_ovr = (__HANDLE__)->Instance->DR; \
|
||||
tmpreg_ovr = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg_ovr); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Clear the SPI FRE pending flag.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg_fre = 0x00U; \
|
||||
tmpreg_fre = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg_fre); \
|
||||
}while(0U)
|
||||
|
||||
/** @brief Enable the SPI peripheral.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
|
||||
|
||||
/** @brief Disable the SPI peripheral.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup SPI_Private_Macros SPI Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Set the SPI transmit-only mode.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
|
||||
|
||||
/** @brief Set the SPI receive-only mode.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
|
||||
|
||||
/** @brief Reset the CRC calculation of the SPI.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
|
||||
SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U)
|
||||
|
||||
/** @brief Check whether the specified SPI flag is set or not.
|
||||
* @param __SR__ copy of SPI SR register.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
|
||||
* @arg SPI_FLAG_TXE: Transmit buffer empty flag
|
||||
* @arg SPI_FLAG_CRCERR: CRC error flag
|
||||
* @arg SPI_FLAG_MODF: Mode fault flag
|
||||
* @arg SPI_FLAG_OVR: Overrun flag
|
||||
* @arg SPI_FLAG_BSY: Busy flag
|
||||
* @arg SPI_FLAG_FRE: Frame format error flag
|
||||
* @retval SET or RESET.
|
||||
*/
|
||||
#define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \
|
||||
((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified SPI Interrupt is set or not.
|
||||
* @param __CR2__ copy of SPI CR2 register.
|
||||
* @param __INTERRUPT__ specifies the SPI interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval SET or RESET.
|
||||
*/
|
||||
#define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \
|
||||
(__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Checks if SPI Mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI Mode.
|
||||
* This parameter can be a value of @ref SPI_Mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \
|
||||
((__MODE__) == SPI_MODE_MASTER))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* This parameter can be a value of @ref SPI_Direction
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is 2 lines.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
/** @brief Checks if SPI Data Size parameter is in allowed range.
|
||||
* @param __DATASIZE__ specifies the SPI Data Size.
|
||||
* This parameter can be a value of @ref SPI_Data_Size
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_8BIT))
|
||||
|
||||
/** @brief Checks if SPI Serial clock steady state parameter is in allowed range.
|
||||
* @param __CPOL__ specifies the SPI serial clock steady state.
|
||||
* This parameter can be a value of @ref SPI_Clock_Polarity
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
|
||||
((__CPOL__) == SPI_POLARITY_HIGH))
|
||||
|
||||
/** @brief Checks if SPI Clock Phase parameter is in allowed range.
|
||||
* @param __CPHA__ specifies the SPI Clock Phase.
|
||||
* This parameter can be a value of @ref SPI_Clock_Phase
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
|
||||
((__CPHA__) == SPI_PHASE_2EDGE))
|
||||
|
||||
/** @brief Checks if SPI Slave Select parameter is in allowed range.
|
||||
* @param __NSS__ specifies the SPI Slave Select management parameter.
|
||||
* This parameter can be a value of @ref SPI_Slave_Select_management
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_INPUT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_OUTPUT))
|
||||
|
||||
/** @brief Checks if SPI Baudrate prescaler parameter is in allowed range.
|
||||
* @param __PRESCALER__ specifies the SPI Baudrate prescaler.
|
||||
* This parameter can be a value of @ref SPI_BaudRate_Prescaler
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
|
||||
|
||||
/** @brief Checks if SPI MSB LSB transmission parameter is in allowed range.
|
||||
* @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit).
|
||||
* This parameter can be a value of @ref SPI_MSB_LSB_transmission
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \
|
||||
((__BIT__) == SPI_FIRSTBIT_LSB))
|
||||
|
||||
/** @brief Checks if SPI TI mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI TI mode.
|
||||
* This parameter can be a value of @ref SPI_TI_mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \
|
||||
((__MODE__) == SPI_TIMODE_ENABLE))
|
||||
|
||||
/** @brief Checks if SPI CRC calculation enabled state is in allowed range.
|
||||
* @param __CALCULATION__ specifies the SPI CRC calculation enable state.
|
||||
* This parameter can be a value of @ref SPI_CRC_Calculation
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
|
||||
((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
|
||||
|
||||
/** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range.
|
||||
* @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation.
|
||||
* This parameter must be a number between Min_Data = 0 and Max_Data = 65535
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \
|
||||
((__POLYNOMIAL__) <= 0xFFFFU) && \
|
||||
(((__POLYNOMIAL__)&0x1U) != 0U))
|
||||
|
||||
/** @brief Checks if DMA handle is valid.
|
||||
* @param __HANDLE__ specifies a DMA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization/de-initialization functions ********************************/
|
||||
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID,
|
||||
pSPI_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* I/O operation functions ***************************************************/
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
|
||||
uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
|
||||
uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
|
||||
uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
|
||||
/* Transfer Abort functions */
|
||||
HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi);
|
||||
|
||||
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State and Error functions ***************************************/
|
||||
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
|
||||
uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32F4xx_HAL_SPI_H */
|
||||
|
2027
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_spi.h
Normal file
2027
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_spi.h
Normal file
File diff suppressed because it is too large
Load Diff
3915
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c
Normal file
3915
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c
Normal file
File diff suppressed because it is too large
Load Diff
Loading…
x
Reference in New Issue
Block a user